Dr. M. Chandrasekhar has 21 years of Defense Industrial R&D experience and 11 years of Engineering Teaching Experience for UG & PG at Central and State Universities. He worked as a Senior Manager (R&D) in Missile Technology at Bharat Dynamics, Hyderabad, Ministry of Defense, Government of India. He is well-known for his significant contributions towards the indigenous design, development of Embedded Test Systems Deployment. His achievements were recognized two times for prestigious national awards, “ Excellence Award-2003 ” awarded in 2005 for Indigenization and saving foreign exchange of 40 Crore. The second time, “Excellence Award-2005” awarded in 2007 for Innovation of Countermeasure defense system for Fighter Aircrafts (Developed First time in India). Award from Hon. President of India via defense Ministry, Government of India.
He was graduated from Osmania University Campus, in 1986, M. Sc. (Tech.) 3yr Integrated PG with “Applied Electronics” and a second Master’s degree, M. Tech. From the Indian Institute of Science, Bangalore in 1994. He was awarded a Doctorate in “VLSI Embedded Systems” from SKU Acanthus, in 2009. He was appointed as a scientist in 1995, under Deportment of Atomic Energy (DAE) in Plasma Research Institute (IPR) at Ahmadabad. He resigned in 1996 and joined as a faculty for newly started M. Sc., an Electronics program at the University of Hyderabad. He played a key role in establishing a newly started Master Degree Program in Electronics. He developed advanced Microprocessors Lab., and Applied Lasers experimental Lab. For PG Program.
He joined the BDL R&D unit in Hyderabad. Being a new R&D, he established a strong foundation for advanced Embedded Systems research groups to equip Armed forces with new portable, power-efficient technologies of interdisciplinary Systems. As a New project advisor, he significantly contributed towards the formulation of several sub-systems by innovative and reverse engineering approaches for ATGMs, SAMs, and HILS. His contribution to the development of cost-effective Realtime Hardware In Loop Simulators (HILS) for Training and education saved a lot of foreign exchange. As Sr. Manager, from 2012, he headed long-range missile programs, Agni-3 and Agni-5 as a quality control head at the center for Advanced systems (A DRDO Establishment). He led the most critical testing groups of the Agni missiles. Attain the complete self-sufficiency in electrical assembly and testing of the state-of-the-art Missiles assembly in line with DRDO Teams. He optimized the mission-critical adaptive test procedures and techniques for speedup and timely completion in the assembly line for Long Range Agni-5 missile production.
He holds the distinction of being inducted as Board of Governors (BoG) member as Industrialist Member at JNTU Hyderabad. He is a Fellow of the Instrument Society of India, Sensors Research Society (DRDO), a Life member of ISTE, and many other Academies and Scientific societies in the country. Dr. Chandrasekhar is invitee and key note speaker in several prestigious national and international invitations for Invited Talks and Chair Person, which includes the Technical University Berlin, Germany, Indian Institute of Science, IIT Delhi, BARC, and Central Electronics Engineering Institute (CEERI) for Engineering Excellence. He is an active BoS member and research super wiser of OU, JNTUH, SKU-Ananthpur, RU-Kurnool, and MGR Univ. Chennai. He has more than 20 years of combined University teaching, research, and R&D management experience. He has published around 45 research papers in International & National Journals and Conferences. He received few “Best Paper Awards” for the research work presented at TU, Berlin on Speech Recognition in 1992 from Vice-Chancellor Amravati University, and from Vice-Chancellor of SK University in 2006 for his contribution to continuing training on Embedded Systems and VLSI in the Universities.
He is an IIM Calcutta Trained member on Quality Analytics. He attended several high-level Technology Management Program of the premier institutes of India. Presently guiding research scholars in the areas of Image processing, Artificial Intelligence, Speech Recognition, VLSI, and Embedded Systems. Guided For Ph.D. and Two in Progress.
VLSI, FPGA and SoC
IoT with AI
Signal & Image processing
SoC Design, Embedded Systems Design,
Industrial Internet of Things (IIoT),
Speech Signal Processing,
Digital Image Processing,
- International Journal publications 28
- National Journal Publications 14
- International conference papers 25
- National Conference Papers 20
- International conference Invited Talk 08
- National and International Conference Chair 05
- International Conference organized 04
- Technical project reports 50
- National conference Invited Talk- 50
- M. Tech. Projects 50
- UG Projects Trained & Guided 2000
- 1. M Chandrashekar, K Sudarshan Reddy, U Naresh Kumar, “FPGA Implementation of High Speed Infrared Image Enhancement”. International Journal of Electronic Engineering Research 1 (3), 279-285 , 2009 (Citations ….26)
- Padmanabham, K Prabhakar, M Chandrashekar, K Nagabhushan Raju, “MIL-STD-1553 BUS PROTOCOL ALGORITHMS IMPLEMENTATION ON FPGA TO REALISE SYSTEM-ONCHIP( SOC)” International Journal of Advanced Technology and Innovative Research (IJATIR … , 2016 (Citations 4)
- K Padmanabham, K Prabhakar, M Chandrashekar, K Nagabhushan Raju, “A Review of MIL-STD-1553 Bus Trends and Future” International Journal of Advanced Research in Computer and Communication … , 2016 (Citations ….3)
- Brahmanya Sastry, M Chandrashekar. “The Use of Artificial Neural Networks for Automatic Modulation Recognition” S SuInternational Journal of Advanced Technology and Innovative Research (IJATIR … , 2016 (Citations ….1)
- K Raj, M Chandrashekar, “FPGA based Parallel Filters Error Correction Codes using Hamming Code”,Journal of Test Engineering & Management ISSN: 0193-4120 81 (2019/11), 6329 … , 2019
- K Raj, M Chandrashekar, “Artificial Intelligence Algorithmic Based Fault Tolerance with OLC Codes for Parallel Fault Detection and Correction FFT Soc Design” International Journal of Recent Technology and Engineering (IJRTE), 2019
- K Raj, M Chandrashekar, “FPGA Based Parallel Filters for Failure Recovery”International Conference on Recent Developments in Control, Automation …, 2019
- P Jeethendra, M Chandrashekar, “Accuracy of Telugu Language Speech Recognition corresponding to Size of the Speech Corpus Database” International Journal of Computer Technology & Applications, 8 (3), 349-360 , 2017
- P Jeethendra, M Chandrashekar, “Linear Predictive Coding and Cepstral Analysis for Telugu Speech Recognition” International Journal of Computer Trends and Technology (IJCTT) 47 (1), 50-60 , 2017
- S Muralikrishna, M Chandrashekar, “Determination with Deep Learning and One Layer Neural Network for Image Processing in MultiSlice CTAngiogram” International Journal of Engineering Research and Application www.ijera.com … , 2017
- S Muralikrishna, M Chandrashekar, “Digital Image Processing Assessment in Multi Slice CT Angiogram using Liner, Non-Liner and BothClassifiers”, International Journal of Engineering Research and Application www.ijera.com … , 2017
- P. Jeethendra , M. Chandrashekar , “Recent Trends in Speech Recognition approaches and its application for Telugu Language for Speech &Hearing Impaired” International Journal of Latest Transactions in Engineering and Science 1 (4 … , 2017
- P Jeethendra, M Chandrashekar, “Recent Trends in Speech Recognition approaches and its application for Telugu Language for Speech &Hearing Impaired”, International Journal of Latest Transactions in Engineering and Science 1 … , 2017
- M Chandrashekar, K Nagabhushan Raju, “FPGA BASED EMBEDDED SYSTEM FOR OBJECT TRACKING”.
Published Book ISBN-13 : 978-3-659-955-3, ISBN-10 : 3659955273 , EAN …, 2016
- K Padmanabham, K Prabhakar, M Chandrashekar, K Nagabhushan Raju, “MIL-STD-1553 BUS PROTOCOLS IP CORE IMPLEMENTATION IN FPGA TO REALISE SYSTEM-ONCHIP (SOC) :TESTING, VALIDATION & ANALYSIS”,International Journal of Advancements in Research & Technology 5 (8), 29-35 , 2016
- S Subrahmanya Sastry, M Chandrashekar, “An Expert Discrete Wavelet Adaptive Network Based Fuzzy Inference System for Digital ModulationRecognition” International Journal of VLSI System Design and Communication Systems 4 (6 … , 2016
- S Subrahmanya Sastry, M Chandrashekar, “Adaptive Procedure for Automatic Modulation Recognition” International Journal of VLSI System Design and Communication Systems 4 (6 … , 2016
- S Subrahmanya Sastry, M Chandrashekar’ “Recognition of Digital Modulated Signals Based on Statistical Parameters” International Journal of Advanced Technology and Innovative Research 8 (6 … , 2016
- K Padmanabham, K Prabhakar, M Chandrashekar, K Nagabhushan Raju, “DESIGN APPROACH FOR IMPLEMENTATION OF BRIDGE BETWEEN MIL-STD-1553 BUS AND GIGABIT ETHERNET” International Journal of Electronic Networks, Devices and Fields 8 (1), 19-25 , 2016
- K Padmanabham, K Prabhakar, M Chandrashekar, K Nagabhushan Raju, “DSP Based Embedded System with MIL-STD-1553 Bus Interface for Altitude Measurements Using FMCW Technique” International Journal of Electronic Engineering Research 3 (1), 39