Dr.E. Srinivas

Assistant Professor

Email: [email protected]


Dr.E. Srinivas Pursued his Ph.D degree in Electronics and Communication Engineering at JNTU Hyd. Currently he serves as a Associate professor in Department of Electronics and Communication Engineering, Anurag Group of Institutions, Hyderabad, India. He has research and teaching experience of more than 10 years. He has published more than 20 research papers in SCI/Scopus journals and reputed conferences. His Doctrol research is directed towards the design a low voltage, low power Analog and Mixed Signal Integrated circuits. He also served as keynote speaker and advisory committee member.

Research Interests

E.Srinivas actively involved in wide research areas which include Low Power Analog Integrated Circuits, Analog to Digital converters (ADC), Digital to Analog Converters (DAC) and Mixed signal IC Design. His few areas of research interests are CMOS Analog Integrated Circuits, CMOS Digital Integrated Circuits Mixed Signal IC Design and Optimization Algorithms.

Teaching Interests

Mr.E.Srinivas has teaching experience of more than 10 years. Her interest includes Low power VLSI design, System on chip, Optimization Algorithms, Analog Integrated Circuits, Digital Integrated Circuits and Mixed Signal IC design.

Selected Publications

  1. E.Srinivas, N.Balaji, L.Padmasree “Optimal sizing of CMOS operational amplifiers using modified particle swarm optimization” Journal of Advanced Research in Dynamical andControlsystem Vol. 10, 2018.(Elsevier Free SCOPUS INDEXED JOURNAL).
  2. E.Srinivas, N.Balaji, L.Padma Sree “Multi-Objective optimization Methodology For Efficient CMOS Operational Amplifier In The Design Of Low Power 2nd Order DT Sigma Delta Modulator” International Journal of Pure and Applied Mathematics(IJPAM) Vol.114 No.10 2017,151-62.(SCOPUS INDEXED JOURNAL).
  3. E.Srinivas,N.Balaji,L.Padmasree, “A Multi-objective optimization Methodology
    Applied to the low-power CMOS operational amplifiers” ARPN Journal of Engineering and Applied Sciences Vol.12, No.11, june 2017(SCOPUS INDEXED JOURNAL).
  4. E.Srinivas, N.Balaji,L.Padmasre, “ A Novel Optimization Methodology for CMOS Operational Amplifiers” International journal of research in electronics and computer engineering(IJRECE) Vol. 6 Issue 3 july-sept,2018.(UGC APPROVED JOURNAL)
  5. E.Srinivas, N.Balaji,L.Padma sree , “An Optimized Device Sizing of Two-StageCmos Op-Amp Using Multi-Objective Genetic Algorithm” International Journal on Cybernetics & informatics(IJCI) Vol.5, No.4, August 2016.
  6. E.Srinivas, N.Balaji, L.Padmasree, “A Novel Methodology of simulation and
    realization of various op amp topologies in 0.18µm CMOS Technology using MATLAB” International Journal of VLSI design & Communication systems(VLSICS) Vol.6,No.5,November 2015


  • Completed Ph.D in 2020 on Low Power Analog VLSI design from JNTUH, Hyderabad.
  • 2008-2010 Master’s Degree in VLSI System Design, JNTUH, Hyderaba.
  • 2003-2007 Bachelor of Technology in Electronics and Communication Engineering from JNTUH, Hyderabad.