Dr. M. Kiran Kumar Completed Ph.D at K.L.E.F (Deemed to be University), Guntur, Andhra Pradesh, India in the field of Low Power VLSI Design and M.Tech in VLSI System Design from A. S. R Engineering College (JNTUK) A.P, India, completed B.E in Electronics and Communication Engineering from S.V.P Engineering College (Andhra University) in 2007. He served as a Project Engineer at RCI Lab DRDO, Hyderabad from 2007-2010. He has 8 Years of teaching experience and currently working as Assistant Professor in the Department of Electronics and Communication Engineering at Anurag group of institutions, Hyderabad, India. He has published more than 20 research papers in SCI-E/Scopus/UGC journals and guided more than 15 M.tech Scholars.
He actively involved in the research areas, which include Circuit analysis and Analog Electronics, Low Power VLSI Design, Mixed Signal IC Design, Signal Processing and Machine Learning and interested at Innovative methods in Outcome based education.
Mr. M. Kiran Kumar teaching interest includes Analog Electronics, Electromagnetic Theory, Signals and Systems, Digital System Design, Pulse and Digital Circuits, Low Power VLSI Design, CMOS Digital IC Design, Verilog HDL programming, Xilinx Vivado
- Kiran Kumar Mandrumaka, Fazal Noorbasha1 “A low power 10 bit SAR ADC with variable threshold technique for biomedical applications”. Applied Sciences, Springer Nature, Volume 1, Issue 8, 2019. Impact Factor: 1: 918. https://doi.org/10.1007/s42452-019-0940-3
- M. Kiran Kumar, Fazal Noorbasha “High Performance Bulk Driven Operational Trans Conductance Amplifier and Applications” in International Journal of Innovative Technology and Exploring Engineering (IJITEE), Vol-8 Issue-12S, October 2019.ISSN: 2278-3075,DOI: 10.35940/ijitee.L1089.10812S19
- M. Kiran Kumar, FazalNoorbash “A 0.5V Bulk driven Operational Trans conductance Amplifier for detecting QRS Complex in ECG Signal”. International Journal of Pure and Applied Mathematics, Volume 117 No. 19 2017.
- M. Kiran Kumar, Fazal Noorbasha and K. S. Rao “Design of Low Power 16X16 SRAM Array using GDI Logic with Dynamic Threshold Technique” in ARPN Journal of Engineering and Applied Sciences, VOL. 12, NO. 22, NOVEMBER 2017
- M. Kiran Kumar, Amrita Sajja, G.Pravalika . 2017. DESIGN AND FPGA IMPLEMENTATION OF CA BASED FOUR BYTE ERROR DETECTION AND CORRECTION .International Journal of Science & Technology , Vol. 7 Issue 1, February 2017
- Kiran Kumar Mandrumaka, and Dr. Fazal Noorbasha . 2017. Design of Low Voltage D-Flip Flop Using MOS Current Mode Logic (MCML) For High Frequency Applications with EDA Tool. IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) ,Volume 7, Issue 4, Ver. I (Jul. – Aug. 2017), PP 09-14
- Kiran Kumar Mandrumaka, and Dr. Fazal Noorbasha . 2017. Design and FPGA Implementation of AMBA APB Bridge with Clock Skew Minimization Technique . IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 7, Issue 3, Ver. I (May. – June. 2017), PP 42-45
- Completed Ph.D at K.L.E.F (Deemed to be University), Guntur, Andhra Pradesh, India..
- M.Tech in VLSI System Design from A. S. R Engineering College (JNTUK) A.P, India.
- B.E in Electronics and Communication Engineering from S.V.P Engineering College (Andhra University) in 2007