Mr. S B Lokesh is pursuing Ph.D. in Electronics and Electrical Communication Engineering from IIT Kharagpur. Currently he serves as an Assistant Professor in Department of Electronics and Communication Engineering, Anurag University, Hyderabad, India. He has research and teaching experience of nearly 8 years.
Mr. S B Lokesh is actively involved in research areas which include Analog and Mixed Signal VLSI Design.
Mr. S B Lokesh has a teaching experience of nearly 8 years in various academic positions. He delivered hands on session in Cadence Design Systems. He taught under graduate and post graduate students in CMOS VLSI Design, Design of Analog CMOS Integrated Circuits, Analog Electronics Circuit, Analog VLSI, Electronic Devices and Circuits, Switching Theory and Logic Design, Integrated Circuit Applications, Network Theory. He has design and tool expertise in Cadence, MATLAB, Simulink. He prepared course materials and set up laboratory for the courses Semiconductor Devices and Digital Electronics.
- Rao, Tirumalasetty Venkata, S. B. Lokesh, KVKVL Pavan Kumar, and E. Raghu Veera. “Design and Implementation of 1-Bit Full Adder Using Voltage Bootstrapping Circuit.” International Journal of Pure and Applied Mathematics 117, no. 18 (2017): 367-372
- Lokesh, S. B., K. MeghaChandana, V. Niharika, A. Prathyusha, and G. Rohitha. “Design of Read and Write Operations for 6TSRAM Cell.” IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) 8, no. 1, 2018 (2018): 43-46.
Selected Awards and Honors:
- Best Faculty award from KL University
- I/c Head Department of ECE, RGUKT, IIIT Basar
- Ph.D. in Analog and Mixed Signal VLSI Design from the Department of Electronics and Electrical Communication Engineering, IIT Kharagpur (Pursuing)
- Masters in Electronics System Design VLSI from Department of Electronic Systems Engineering, DESE (Previously CEDT Department), IISc Bangalore in the year 2010
- Bachelor of Technology in Electronics and Communication Engineering from J B I E T, JNTU Hyderabad in the year 2006