RAJESH THUMMA

ASSOCIATE PROFESSOR

[email protected]

Biography

Dr Rajesh Thumma received his degrees B.Tech in Electronics and Communication engineering from Sree Kavitha College of engineering, in 2007, M.Tech from the BITS khammam under JNTU Hyderabad, Telangana, India and PhD in School of Electronics Engineering from the KIIT University, Bhubaneswar, India in 2018. He has research and teaching experience of more than 15 years. He is visited University of west Bohemia, Pilsen, Czech Republic and Lublin University of Technology, Lublin, Poland as a part research work. He has collaborated with the Department of Electrical Machines and Drives, Lublin University of Technology, Lublin, Poland. He started his career as an Assistant Professor from NOVA college of Engineering and Technology, Jafferguda, Hyderabad, India and he is currently working as Associate Professor in the Department of Electronics and Communication engineering at Anurag University, Hyderabad, India since July 2010. He is a reviewer for IEEE, Springer and other reputed journals. He served as Session Chair, coordinator for Springer international conference and national conference. He has published more than 18 research papers in SCI-E/SCI/Scopus journals and IEEE Conferences.

Research Interests

  1. Resonant Power Converters
  2. Deep learning
  3. Machine learning

Teaching Interests

Dr Rajesh Thumma teaching interests are focused on Basic Electronics, Analog Circuit Analysis, Big Data Analytics and Machine learning and Artificial intelligence, Pulse and Digital circuits, Integrated circuit applications, STLD, VLSI and CMC

Selected Publications

  1. Improved Bidirectional DC/DC Converter Configuration with ZVS for Energy Storage System: Analysis and Implementation”, IET Power Electronics, SCI-E indexed Journal, 11PP.     DOI: 10.1049/IET-PEL.2019.1156, PRINT ISSN 1755-4535, ONLINE ISSN 1755-4543.
  2. The Potential Role of PV Solar Power System to Improve the Integration of Electric Energy Storage System”, International Journal of Photoenergy, Hindawi, Volume 2022, Article ID 8735562, https://doi.org/10.1155/2022/8735562, SCI-E indexed Journal, ISSN: 1110-662X
  3. “Design and Verification of Daisy Chain SPI Using System Verilog & Universal Verification  Methodology”,  TELKOMNIKA (Telecommunication, Computing, Electronics and Control), Scopus Indexed Journal, Vol. 21, No. 1, February 2023, pp. 168~177, ISSN: 1693-6930, DOI: 10.12928/TELKOMNIKA.v21i1.24093

Selected Awards and Honors

Education

  • Ph.D awarded by School of Electronics Engineering , KIIT Deemed to be University,
    Bhubaneswar, India, Feb 2018.
  • Post-Graduation: Master of Technology (M.Tech) in VLSI system design Discipline from JNTU,
    Hyderabad at Bomma College of Engineering and Technology, Khammam, Telangana (India) with the
    first class during 2010-2012.
  • Under-Graduation: Bachelor of Technology in Electronics and Communication Discipline from
    JNTU, Hyderabad at Sree Kavitha College of Engineering, Khammam, Telangana (India) with the first class during 2003-2007.

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