Dr. E. Srinivas

M.Tech., Ph.d.,

Associate Professor

[email protected]


Dr. E.Srinivas received B.Tech degree, M.Tech degree and Ph.D from JNTU Hyderabad in 2007, 2010 and 2020 respectively. He has been working in the Department of Electronics and Communication Engineering, Anurag University, Hyderabad from 2012. He has been elevated as Associate Professor of ECE in 2023. He is presently serving as Additional Controller of Examinations (ACOE), Anurag University. He is actively involved in establishing the state of art Laboratories in the Department. He has 30 research publications in SCI/Scopus/Web of Science journals and reputed conferences to his credit. Presently three Ph.D. students are pursuing their research under his guidance.  He received a FDP Fund from JNTU Hyderabad under TEQUIP-III worth of 0.5 Lakh. His research interests include a Role of Machine Learning Techniques in Chip Design, Analog and Mixed Signal Circuit Design, Low Power Design Techniques, Optimization Algorithms, AI/ML Techniques.

Research Interests

  1. Analog and Mixed Signal Circuit Design
  2. Low Power Design Techniques
  3. AI/ML

Teaching Interests

Mr.E.Srinivas has teaching experience of more than 10 years. Her interest includes Low power VLSI design, System on chip, Optimization Algorithms, Analog Integrated Circuits, Digital Integrated Circuits and Mixed Signal IC design.

Selected Publications

  1. E.Srinivas ,Muralidharan,. ” On Reducing Test Data Volume For Circular Scan Architecture Using Modified Shuffled Shephered Optimization.” Journal of Electronic Testing (2021) –Springer (Impact Factor: 7.151) November 2021,Vol.No.37 PP-577-592,https://doi.org/10.1007/s10836-021-05975-9.-(Science Citation Index).
  2. E.Srinivas,,M.Mounika “Model based Design and Implementation of Coarse  C/A Code of IRNSS Signal of FPGA” International Journal of Future Generation Communication and Networking, 2021,Vol. 14,No. 1 PP-705-713 (Emerging Source Citation Index).
  3. E.Srinivas, N.Balaji,L.PadmasreOptimal sizing of CMOS Operational amplifiers using modified particle swarm optimization” Journal of Advanced Research in Dynamical & Control Systems Vol. 10, 09-Spcial Issue,2018 PP-2172-2189.(Elsevier Free Scopus Indexed Journal).

Selected Awards and Honors

  • Received Young Research Award-2020 from Institute of Scholar.
  • Received Best Paper Award in ICAIECES-2017(International Conference)
  • Received FDP fund Granted 50,000/- From TEQUIP-III,JNTU Hyderabad

External Profile Links

  • Ph.D. VLSI Design JNTU Hyderabad – 2020 M.Tech VLSI System Design CVSR College of Engineering, Hyderabad 74% 2010
  • B.Tech Electronics and Communication Engineering Anurag Engineering College,  Kodad 73% 2007
  • H.S.C M.P.C Aurobindo Jr.College Hyderabad 69.6% 2003
  • S.S.C   Z.P.H. School-S.Lingotam 66% 2001
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